1. Field of the Invention
The present invention relates generally to main boards for backplane buses. The invention also relates to a bus connection technique used for personal computers, servers, routers, and other information-processing units in order to interconnect functional circuits such as a processor and a memory. More particularly, the invention relates to a main board for backplane buses, suitable for reducing radio-frequency noise.
2. Description of the Related Art
One of the problems encountered in transmitting digital signals of a 10-Gbps (gigabits per second) class is that the signal waveforms become disturbed. This problem arises from electrical restrictions on the printed-circuit board that constitutes wiring. That is to say, the above is because metallic wiring attenuates signals by a skin effect more significantly at higher frequencies and because the dielectrical losses in insulators also cause more significant signal attenuation at higher frequencies. These factors have frequency dependence and cause more significant attenuation at higher frequencies.
For backplane buses, their main board (also referred to as a motherboard; the term “motherboard” is used in the remainder of this Specification) has a large quantity of wiring routed to interconnect the modules (sub-boards or daughter boards) mounted on the motherboard. For intermodule wiring, even if a single module undertakes both transmitting and receiving functions, a plurality of signal lines exist, and providing a plurality of signal lines ensures favorable signal transmission throughput. Using 20 bits of 10-Gbps signal data, for example, allows a transfer rate of 200 Gbps to be achieved. The 20-bit signal wiring length in this case is almost equal.
In addition, 1:1 intermodule high-speed signal connection is used for backplane buses, in which case, a plurality of combinations are possible and 12 wiring formats are available for four modules, for example This means the same combination as that of retrieving two from four. For backplane buses, therefore, there are a set of signals of the same wiring length for transmitting signals between modules of the same specifications, and a set of signals of different wiring lengths according to a particular combination of modules.
Timing also differs between the sets of signals. Even during transfer between the modules having a plurality of signals, although signal transmission between modules of the same specifications is usually synchronous, the transmission timing of the signals differs from that of signal wiring for other module combinations. Accordingly, focusing attention on one signal wiring section allows one to see that crosstalk noise, power-supply bounce noise, or other forms of asynchronous noise are propagated with other intermodule transmission signals as their noise sources.
Since the transmission signal itself suffers significant attenuation at high frequencies, the signal-to-noise ratio (S/N ratio) deteriorates in a high-frequency band and an appropriate S/N ratio in a high-frequency band must be achieved to ensure stable operation.
In this context, the noise occurring on the circuit boards of electronic devices is a big problem. In connection with this problem, a method of suppressing noise propagation between any two elements efficiently is shown in, for example, the following Non-Patent Reference 1:
A method of reducing the analog-to-digital signal interference shown in Non-Patent Reference 1 will be outlined hereunder with reference to FIGS. 19 to 22.
FIG. 19 is a cross-sectional view of the analog-to-digital signal mixed circuit board for signal-to-signal noise cutoff, based on a conventional technique.
FIG. 20 is a top view of the power supply layer of the analog-to-digital signal mixed circuit board for signal-to-signal noise cutoff, based on the conventional technique.
FIG. 21 is a view showing the EBG pattern of the above analog-to-digital signal mixed circuit board for cutting off signal-to-signal noise.
FIG. 22 is a graph that represents power supply noise propagation levels in a certain frequency band, or propagation losses between analog part and digital part.
FIG. 19 is a cross-sectional view of a circuit board showing a typical example of an analog-to-digital (A-D) signal mixed circuit composition. In FIG. 19, the analog circuit 101 connected to a radio-frequency (RF) antenna 103 has a wide dynamic range. A digital signal processor (DSP) 102 is connected to the analog circuit 101 and processes digitized signals. The analog circuit 101 and the digital circuit 102 are both mounted on a printed-wiring circuit 110.
The analog circuit 101 has a wide dynamic range so as to be able to handle both of very weak receiver signals and strong transmitter signals. This dynamic range is, for example, from 40 to 60 dB for use in an apparatus having a wireless function. For this reason, the noise generated by the digital circuit 102 such as the DSP, enters the analog circuit 101 and deteriorates the characteristics of the circuit 101. Non-Patent Reference 1 discloses a method of suppressing the entry or propagation of the noise. In this Reference, the electromagnetic bandgap (EBG) pattern denoted by a reference number 50 is periodically constructed in the power supply ground layer that is the inner layer of the printed-wiring circuit 110. In this way, the noise propagation can be suppressed.
In Non-Patent Reference 1, the EBG pattern is, as shown in FIG. 21, constructed as a combination of two metallic patterns of different sizes, namely, a small pattern 50-1 and a large pattern 50-2. These patters are arranged in a periodic format to construct the EBG pattern. The interspace between the analog circuit 101 and analog circuit 102 of the power supply layer in the printed-wiring board 110 is lined with the EBG pattern to suppress the noise propagation in a high-frequency range while at the same permitting a direct current (DC) to flow through. In other words, the EBG pattern is a pattern constructed by periodic arrangement of electrical lines different in impedance.
An example of power supply noise propagation levels at certain frequencies in the above case is shown in FIG. 22. In FIG. 22, the ratio of noise propagation between the analog circuit 101 and digital circuit 102 in FIG. 20 is represented on a vertical axis, and it can be seen that the pattern has significant noise suppression bandgap characteristics of −60 dB at frequencies from 3 GHz to 7 GHz.
[Patent Reference 1] Japanese Laid-Open Patent Application Publication (JP Kokai) No. 2000-216586
[Patent Reference 2] JP Kokai No. 2000-223800
[Patent Reference 3] JP Kokai No. 2000-183541
[Patent Reference 4] JP Kokai No. H09-275278
[Patent Reference 5] JP Kokai No. 2001-127387
[Non-Patent Reference 1] Madhavan Swaminathan, et al., “Power Delivery Isolation Methods in Integrated Mixed Signal Systems,” Proc. of Electrical Design of Advanced Packaging and Systems (EDAPS) workshop, pp. 1-17, Nov. 29, 2004.
The technology disclosed in above Non-Patent Reference 1 is effective for reducing AC-component-induced noise by embedding an EBG pattern in the circuit board.
However, if the power supply layer and the ground layer are arranged in opposed form as in a motherboard for backplane buses, the consequent composition of a resonator between the two layers presents the problem that power supply noise superimposition on signals occurs at a resonance frequency. The superimposition, in turn, poses the problem of increased electromagnetic radiation noise. In above-described Patent Reference 1, for example, a method of reducing electromagnetic noise by curvilinearly slitting the power supply layer of a multilayer circuit board is also disclosed as a solution to the above. However, although the use of this noise reduction method makes it possible to change the resonance frequency of opposed power supply layers, this method cannot be directly applied to a motherboard for backplane buses. This is because, for a split motherboard originally having a large area, a higher-order resonance frequency occurs and this causes high-frequency noise to enter data signals. That is to say, resonance occurs in each split power supply area and the frequency in this case could increase to as high as twice the original resonance frequency.
In addition, if signal layers are arranged vertically so as to straddle the slits in the power supply (ground) layer, the feedback currents of the signals are necessitated to detour the slits and these detour currents deteriorate S/N ratios. Methods of solving this problem are described in above Patent References 2, 3.
In Patent Reference 2, the occurrence of noise due to the detouring feedback currents flowing near the slits is successfully suppressed, but noise reduction between signals is not described. In Patent Reference 3, in order to suppress the resonance due to the slits, the resonance frequency is shifted by placing in the power supply layer a ground plane which is via-connected to the ground layer, and by splitting the power supply pattern of the power supply layer and combining this pattern with a decoupling capacitor. The amount of shift of the resonance frequency is controlled for a drift from the higher-order clock frequency that is a noise excitation source. The technology described in Patent Reference 3, however, is intended to suppress noise due to electromagnetic radiation to a space, and no description is given of signal-to-signal noise suppression effects.
Additionally, above-described Patent Reference 4 discloses the composition and design method of the printed-circuit board for reducing the electromagnetic radiation noise propagated from slits, but this Reference does not describe internode noise reduction, as with Patent Reference 3.
Furthermore, although above-described Patent Reference 5 discloses the composition of the power supply in the printed-circuit board for reducing the electromagnetic radiation noise propagated from slits, this Reference does not describe internode noise reduction, as with Patent Reference 3.
Above-described Patent References 2 to 5 relate to the techniques for slitting the power supply layer of a circuit board. With any one of these techniques alone, it is insufficient for reducing signal noise in the current circuit boards that are coming to handle high-frequency signals most commonly. In other words, these techniques only allow signal noise to be cut off in narrow frequency bands and at small voltage ratios.